
Although the ZSP architecture has taken the lead in previous 3G applications, in the face of the forthcoming 4G standard, the core 4th generation ZSP seems to have come a bit late.
However, there is an old saying in China: Good food is not afraid of late. In fact, this is indeed the case, Wang Yang said: "Compared to the early emergence of software radio solutions, ZSP's solution has a lower power consumption advantage."
Earlier, Dr. Weiyuan Wei, chairman and president of the company, had a more in-depth description: “The pure software-defined radio (SDR) approach brings power consumption challenges to mobile devices, and end-system developers are looking for the highest performance and power consumption. Excellent Balance Based on the ZSP G4 architecture, we have built an adaptive, scalable wireless platform to help mobile communication SoC vendors create the best solution in the shortest time possible.The core ZSP981 DSP core is just fine Meet this need of the designer."
“And we stayed for so long to understand the division of hardware and software.†Wang Yang further explained, “Because we have a design services business, we can consider from a more systematic point of view, such as the TD's standard changes every year , so we need to decide earlier which software to implement and which to use hardware."
In addition to the advantages of power consumption, the fourth-generation ZSP's DSP platform also meets the changing design requirements with its special flexibility. Wang Yang pointed out that with the development of LTE-A technology, more and more modes and algorithms are needed. In this case, the product's design concept will undergo slight changes. In fact, the SPEC of the terminal chip is more and more wasted. In many cases, we design the chip according to the worst environment. However, if we actually consider the actual application environment, many designs are wasted. Our platform can enable customers to develop and design more reasonable chips in the dynamic environment of hardware and software. In this way, both the cost of chips and the power consumption can be further reduced, that is, a true on-demand design.
In order to facilitate the customer's development, VeriSilicon also prepared a development tool suite ZView, which consists of an integrated development environment (IDE), compiler, assembler, optimizer, connector, debugger, simulator and performance analysis tools. It also enhances the performance of several important new products, including vectorized C compilers and other optimization tools to accelerate software development.
In addition, a series of wireless signal processing function libraries optimized for ZSP981 introduced in the same period are implemented to help users save time to market.
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