A unique but simple gate pulse drive circuit

In pulse radar systems, high power amplifiers (HPAs) must be turned on and off rapidly during the transition from transmit to receive mode. A typical target for this conversion time is less than 1 microsecond. Traditionally, this is accomplished through drain control, which involves switching large currents between 28 V and 50 V. While switching power technology can perform this task, it often introduces additional size and complexity into the circuit design. In modern phased array antenna development, where minimizing size, weight, and power (SWaP) is crucial, there is a growing desire to eliminate the complexities associated with HPA drain switches. This paper introduces a novel and straightforward gate pulse drive circuit that offers an alternative method for fast HPA switching without the need for traditional drain switch circuits. The measured switching time is under 200 nanoseconds, significantly exceeding the 1 microsecond target. Additional features include offset programming to account for device-to-device variations, gate clamping to protect the HPA from voltage spikes, and overshoot compensation to optimize pulse rise time. The conventional drain pulse configuration typically uses a series FET to switch the high voltage to the HPA's drain pin. This setup requires careful design to manage inductance and charge storage, often involving additional components like a second FET to discharge the drain capacitor. These elements complicate the control circuit and increase its constraints. To address these challenges, a gate drive circuit is proposed. It converts a logic-level signal into a suitable gate control signal for GaN HPAs. This circuit ensures a negative bias voltage for proper operation and a larger negative voltage to turn the device off. It also manages gate capacitance to achieve a fast rise time with minimal overshoot. The recommended gate pulse circuit employs an operational amplifier configured in an inverting single-supply arrangement. The op-amp’s reference is set using a precision DAC to adjust gain. When the logic input is high, the output is clamped to the negative supply rail; when low, the output approaches a small negative value determined by resistor values and DAC settings. This configuration allows the HPA to turn on when the logic input is low, optimizing performance. Component selection is critical. R1 and R2 set the gain, while the DAC, along with R3 and R4, determines the reference voltage. C1 and R3 form a low-pass filter to reduce noise. R5 and R6 provide clamping functions, ensuring the output remains within safe limits. C3 compensates for gate capacitance, while C2 limits overshoot on the rising edge of the pulse. Testing was conducted using evaluation boards for DACs, op-amps, and HPAs. A pulse generator simulated a 1.8 V logic signal, and an RF sampling oscilloscope measured the HPA's on/off response. The results showed a turn-on time of less than 200 ns, with a fall time even faster, demonstrating ample margin for system requirements. Layout considerations were also addressed, showing that the circuit can be integrated into low-cost PCBs with minimal space. This makes it ideal for high-density phased array applications. In conclusion, this gate pulse circuit provides a fast, efficient, and compact solution for HPA switching. Its features include sub-200 ns conversion time, compatibility with any logic input, programmable bias for device differences, gate voltage clamping, and optimized rise time. As electronic systems become more integrated, this approach is expected to gain traction in applications requiring rapid HPA switching. Author: Peter Delos is the Technical Lead for the Aerospace and Defense Division at Analog Devices. He holds a BSEE from Virginia Tech University and an MSEE from New Jersey Institute of Technology. His career spans military and commercial sectors, including work on naval nuclear power plants and radar systems. Jarrett Liner is an RF Systems Applications Engineer at Analog Devices, with extensive experience in RF systems and device design. He has worked on GaN amplifiers and RF ICs, and previously served as an electronics technician in the U.S. Navy. Outside of work, he enjoys outdoor activities and spending time with his family.

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