The μPD70320 is a 16-bit single-chip microcontroller from NEC Corporation, part of the V25 series. It offers powerful functionality, high reliability, fast processing speed, and excellent compatibility. This chip integrates 512 bytes of RAM, three I/O ports, eight analog inputs, two DMAs, two timers, two full-duplex asynchronous communication ports, and an interrupt controller alongside the CPU. Its advanced fast interrupt system makes it ideal for real-time multitasking applications. The μPD70320 uses a strict CMOS manufacturing process, ensuring stability across a wide voltage range (3–8V) and supporting crystal frequencies from 1–6MHz. It is resistant to interference, making it suitable for use in harsh environments.
The μPD70320 employs a unique dual-bus architecture with 32-bit internal registers and a 6-byte instruction queue. At the same clock frequency, it operates 2–4 times faster than the 8088. Its instruction set is a superset of the 8088, allowing programs developed for PCs to be easily adapted for this microcontroller. This means no special development tools or debugging software are required, significantly reducing development costs and accelerating the design process.
The pin diagram of the μPD70320 is illustrated in Figure 1. The chip shares the same registers and instructions as the 8088, but it includes many integrated peripheral components. It also modifies timing relationships based on its core. New features are implemented through special function registers (SFRs), on-chip data areas (IDAs), and specific instructions. These SFRs and IDAs are arranged consecutively in the 512-byte on-chip RAM. By setting the value of the on-chip data area address register (IDB) in the SFR, the SFR and IDA can be relocated anywhere within the 1MB memory space. The IDB value represents the upper 8 bits of the 20-bit address, enabling access to the SFR as if it were regular memory.
Figure 2 shows the distribution of SFR and IDA. The SFR is used to access on-chip peripheral units, while the IDA supports fast register block switching (RBS) and macro service functions (MSF).
**Special Function Registers (SFR)**
The μPD70320 contains multiple special function registers, each serving different purposes. One key feature is the three I/O ports. Each port can be configured as input or output by setting the corresponding bit in the port mode register (PM). Setting a bit to 1 enables input, while setting it to 0 enables output. The port mode control register (PMC) determines whether a port is in control mode or I/O mode, with 1 indicating control mode and 0 indicating I/O mode. The interface register (P) is used to read and write input/output data.
Another important component is the eight analog comparator inputs. Each input (PTO–PT7) can compare the voltage at the PT terminal with a reference voltage (Vth). If the voltage at the PT terminal exceeds the divided reference voltage, the corresponding bit in the PT register is set to 1. The division ratio can be adjusted using the interface mode register (PMT), with values ranging from 01H to 10H. The division value is calculated as Vth multiplied by the division ratio divided by 16. The addresses for PT and PMT are ××F38H and ××F3BH, respectively.
The μPD70320 also includes two 16-bit timers. Each timer consists of a 16-bit modulus register (MD), a 16-bit decrement register (TD), a control register (TC), a macro service register (TMS), and an interrupt controller (TIC). Timer 0 supports both continuous and single modes, while Timer 1 only operates in continuous mode. In continuous mode, MD sets the initial value, Bit 5 of TC is set to 1 to start the timer, and when TD reaches zero, MD automatically reloads the modulus into TD, restarting the cycle until Bit 5 of TC is cleared. In single mode, TD0 and MD0 can function as separate 16-bit registers, and the timer stops when either reaches zero.
The microcontroller also has two serial communication ports. Each port includes a receive buffer (RB), transmit buffer (TB), mode register (SM), control register (SC), baud rate generator (BRG), communication error register (SE), and various macro service and interrupt registers. Each port has RXD, TXD, and CTS lines. When CTS = 0, transmission begins; when the falling edge of the start bit is detected, reception starts. The data frame format includes a start bit, 7 or 8 data bits, a parity bit, and 1 or 2 stop bits, determined by the SM settings.
In case of communication errors, an interrupt is generated, with lower priority compared to other interrupts. Additionally, vector interrupts are triggered for received data and data transmission, along with RBS and MSF. When an error occurs, the SE register flags the issue, with Bit 0, Bit 1, and Bit 2 representing overflow, frame format, and parity errors, respectively.
The μPD70320 also features two DMA controllers, which allow efficient data transfer between memory and peripherals. There are four DMA modes: memory-to-memory I/O (MtoM), memory and I/O (M & I/O), single-step mode (SSM), and burst mode (BM). In MtoM mode, there are SSM and BM, while in M & I/O mode, there are STM and DRM. Each mode defines how data is transferred upon a DMA request, offering flexibility for different application scenarios.
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