Design of Video on Demand Set Top Box Based on PC

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Abstract: The design of video on demand (VOD) set-top box in CATV network environment is proposed. The set-top box consists of five modules: digital tuner, QAM digital demodulation chip, MPEG-2 demultiplexing chip, I2C bus controller and interface circuit. It is implemented by a PC card that runs under Windows 95. The virtual device driver supported by its software completes the communication between the card and the microcomputer. Through multiple debugging and testing, it can successfully achieve the normal reception of video services.
Keywords: set-top box QAM demodulation MPEG-2 demultiplexing interface circuit virtual device driver

 

The set-top box is the terminal device of the video on demand (VOD) system and is the intelligent interface between the user and the VOD server. It is used for the reception of video services and the transmission of user requests. Therefore, the data transmission in the VOD system is divided into two paths: the downlink path is used to transmit video information to the user; and the uplink path is used to transmit the user's on-demand requirement to the transmitting end. The set-top box based on PC is to make the function of the set-top box into a common PC card form, and realize all functions of video on demand by using a computer. There are several advantages to doing this:
1 Make full use of the software and hardware resources of the microcomputer, thus reducing the cost of the user terminal equipment;
2 Good compatibility, can adapt to different access networks and different types of services;
3 Software maintenance and upgrade is convenient, adapt to future development;
4 Designed for easy operation, aesthetics and a Windows 95/98 based user interface.
The set-top box is composed of two ordinary PC card inserts, which respectively perform downlink data reception and uplink data transmission. The transmission of the uplink data is completed by a built-in MODEM card through the telephone line, and the reception of the downlink data is implemented by another card through the CATV network.

The main content of this paper is how to achieve the normal reception of downlink data on the microcomputer. To this end, a set-top box design scheme based on digital tuner, latest QAM digital demodulation chip and high-performance MPEG-2 demultiplexing chip is proposed. In the hardware design of the set-top box, advanced I2C bus technology, QAM digital demodulation technology, MPEG-2 demultiplexing technology, FIFO memory technology and general ISA bus interface technology are adopted. In the software design, VC++ programming technology is adopted. And the VxD technology for developing virtual device drivers using VToolsD in the Windows 95/98 environment.

 

1 The hardware design of the set-top box The main function of the set-top box is to provide a way for people to access VOD services, and provide a friendly interface for legitimate users. The overall hardware block diagram of the receiving part is shown in Figure 1.
In Figure 1, the downlink data from the CATV network is frequency-selected by a digital tuned circuit. The data stream at a certain frequency point contains data of more than a dozen programs, and the data passes the MPEG-2 standard at the transmitting end. System reuse. The circuit outputs an intermediate frequency signal, which is then output by the analog to digital conversion circuit as an input to the QAM demodulation circuit. The frequency selection and QAM demodulation in the above process are controlled by the microprocessor via the I2C bus.

The QAM demodulated digital signal is sent to the MPEG-2 demultiplexing circuit to realize channel selection, that is, to select a program that the user clicks on. The data of the program is a compressed form of the MPEG-1 standard. In order to save cost and simplify the circuit, and taking into account the current high speed of the microcomputer, and the Windows95 operating system, the hardware decompression method is not used in this design, but the data is transferred to the computer's memory through the host interface circuit by DMA transmission. In the software method, the program is decompressed in real time and played out.

The above circuit can be divided into several relatively independent modules, which are described below.

1.1 Digital Tuning Circuit 1
The digital tuning circuit is actually a high frequency head. Its function is to receive downlink data from the CATV network, and to select the frequency point according to the instructions of the microprocessor (similar to analog TV). The data stream of a selected frequency point still contains digital signals of multiple programs, and each user only watches one program in a certain frequency point. The frequency selection is controlled by the microprocessor via the I2C bus. The connection between the digital tuning circuit and the subsequent circuit is shown in Figure 2.
1.2 A/D video conversion circuit 2
The amplitude of the analog IF signal output by the tuner has already met the input requirements of the A/D converter, so it is directly sent to the A/D converter for digitization for further processing by subsequent digital circuits. The analog-to-digital converter uses a Philips chip that converts analog video signals into binary-encoded digital video signals. The connection of the A/D conversion circuit is as shown in FIG. 2.

1.3 QAM demodulation circuit 1~2?
QAM demodulation circuit is one of the key points and difficulties of the receiving part of the set-top box. The selection of the chip is very important. Its function is to perform QAM demodulation and Other processing on the digital signal outputted by the A/D video conversion circuit to output a baseband digital signal.
The QAM demodulation circuit uses the latest QAM digital demodulation chip. The chip is powerful, fully digital, and does not require a feedback loop outside the chip to support demodulation of 16, 32, 64, 128, and 256QAM. In order to realize the powerful functions of the chip, there are a large number of control/configuration registers for the user to program. These registers can be read or written by the I2C bus or the parallel bus. The chip outputs an error-corrected MPEG-2 transport stream.
The tuning circuit, A/D video conversion circuit and QAM demodulation circuit described above form a relatively independent whole, and their application circuit block diagram is shown in Figure 2.

1.4 I2C bus control circuit 3~4?
In the above circuit, the frequency selection of the tuning circuit and the reading and writing operations of a series of registers in the QAM demodulation chip are controlled by the microprocessor through the I2C bus. There is no I2C bus interface in the microprocessor chip. Therefore, I2C bus control circuit needs to be designed. The circuit consists of the I2C bus controller chip PCF8584, which can be used as an interface for bidirectional communication between most parallel buses and serial I2C buses. It can be used to easily connect the microprocessor to the I2C bus to realize data transmission and control between chips.
The connection method of the I2C bus control circuit and other circuits is shown in FIG.

1.5 MPEG-2 system demultiplexing circuit 1~2?5
In the video on demand system, the source of the program at the transmitting end is a data stream based on the MPEG-1 standard, which is only suitable for relatively error-free environments, such as CD-ROM, VCD transmission. In order to adapt to the transmission of a noisy or lossy medium channel, the MPEG-1 format code stream of multiple different programs needs to be multiplexed according to the MPEG-2 standard. Therefore, the corresponding MPEG-2 demultiplexing circuit is required at the receiving end.

The MPEG-2 demultiplexing circuit receives the command from the microprocessor to implement channel selection, that is, selects one program of the user's on-demand from the selected frequency points of the tuning circuit to satisfy the user's on-demand requirement.
The MPEG-2 demultiplexing circuit uses a High Performance MPEG-2 system demultiplexing chip. After receiving the MPEG-2 system transmission code stream, the chip demultiplexes the transmission layer and the PES (Packetized Elementary Stream) layer, provides a code stream buffer of a certain channel, and outputs the output to the host interface circuit, and the application circuit thereof. The block diagram is shown in Figure 3.

1.6 Computer interface circuit design 6 ~ 8?
In this design, the interface circuit of the computer has two major tasks: First, the microprocessor controls and accesses the tuning circuit, the QAM demodulation circuit, and the MPEG-2 demultiplexing circuit through the interface circuit, so as to complete the multi-channel program data. The tapping of the stream; the second is that the interface circuit transmits the program data outputted by the demultiplexing circuit to the memory of the computer for the microcomputer to decompress and play the software.

It can be seen from Fig. 3 that the access and control of the tuning circuit and the QAM demodulation circuit by the microprocessor are realized by the I2C bus controller chip PCF8584, and the access and control of the demultiplexing circuit by the microprocessor is directly demultiplexed. The chip's microprocessor interface is implemented. In addition, the program data outputted by the demultiplexing chip needs to be transmitted to the memory of the microcomputer through the interface circuit. In order to be suitable for real-time, high-speed or burst data transmission, the interface circuit adopts DMA transmission technology, and uses FIFO (First In First Out) memory as a data buffer circuit. Since the FIFO has a certain storage capacity, it can play a buffering role, so the rate matching problem between the peripheral device and the computer can be well solved. In addition, when peripherals perform continuous data transfers, the host's DMA transfers can be performed intermittently, allowing the host time to perform background tasks such as data processing and display.

 

2 The software of the set-top box is designed in the set-top box. The software design mainly includes three parts: the read and write operations of each chip. Interface software programming and user interface design. The digital tuning circuit, QAM demodulation circuit, I2C bus controller and MPEG-2 demultiplexing circuit chip contain a large number of control and configuration registers for the user to read and write operations, in order to preset related parameters or some parameters. Take control. This needs to be done by programming. The user interface of the set-top box is a typical WINDOWS interface, and all functions of the set-top box (including decompression) are completed through it, so VC++ can be used for programming. The function of the interface software is to transfer the data received by the card to the memory of the computer by DMA. To realize the data transfer of DMA mode under Windows 95/98, it is necessary to write a virtual device driver. This is the focus and difficulty of the entire software design. Due to space limitations, the design idea of ​​the virtual device driver is briefly described below.

The DMA virtual device driver is written in VtoolsD and can be dynamically loaded by Win32 applications. The driver is responsible for DMA transfer the data in the peripheral to the two buffers in memory, and the application reads the data from the two buffers in turn. The implementation is as follows:
The driver entry is a function called Control Dispatcher that handles the system control information associated with the VxD and calls the appropriate processing routine. A dynamically loadable VxD should be able to process the following messages: SYS_DYNAMIC_DEVICE_INIT (for the initialization phase of VxD); SYS_DYNAMIC_DEVICE_EXIT (for the exit phase of VxD); W32_DEVICEIOCONTROL (for communication between the application and VxD). When the Win32 application uses the function CreateFile to dynamically load VxD, the system sends a SYS_DYNAMIC_DEVICE_INIT message, and the Control Dispatcher calls the message processing routine OnSysDynamicDeviceInit to initialize the VxD, such as initialization of the DMA controller, allocation of memory space, initialization of the interrupt controller. Wait. When the Win32 application calls the DeviceIoControl function to send data to VxD, the control routine OnW32DeviceIoControl that the Control Dispatcher calls the message can receive messages from the application, such as the main window handle. When the Win32 application closes the VxD or the Win32 application itself is closed, the Control Dispatcher calls the message's processing routine OnSysDynamicDeviceExit, which can do some cleanup work, such as releasing the DMA buffer.

A hardware interrupt is generated each time a DMA transfer ends. In the VxD interrupt handling routine, the DMA controller is re-initialized (ie, changing the first address of the DMA buffer to point to another buffer to start the next DMA transfer), while sending a message to the Win32 application notifying it Read data in memory.

 

3 Experimental results The above set-top box circuit is made into a PC card for receiving downlink data. First, multiple debugging and testing were performed on each module in the circuit. Then, on the basis of this, the entire circuit is joint-tuned by using the program source for the test (that is, the code stream of a plurality of different programs after transmission multiplexing according to the MPEG-2 standard). It can achieve frequency point selection, QAM demodulation and channel selection, so as to get a certain program that the user wants to broadcast. The data stream format of the program follows the MPEG-1 standard at a rate of approximately 1.4 Mb/s. Finally, the programmed virtual device driver is used to successfully transfer the program to the memory of the computer through the interface circuit. Write a Win32 application for debugging, read the program data in the memory and form a data file to be played by Kingsoft Shadow Game, the effect is good.
Based on the work already done in this paper, the next step will be to start from the following aspects:
(1) Software decompresses the programming of the player.
(2) The software decompresses the communication debugging of the player and the virtual device driver.
(3) Design and programming of the user interface.

 

references
1 Philips Semiconductors. INTEGRATED CIRCUITS DATA SHEET. Product specification 1996.
2 Philips Semiconductors. INTEGRATED CIRCUITS DATA SHEET. Preliminary specification?1996.
3 Philips Semiconductors. The I2C-bus and how to use it. Philips document ordering number 9398 393 40011.
4 Philips Semiconductors. PCF8584- I2C-bus controller. Product specification 1994.
5 Li Hongsong. Digital video technology and its applications. Beijing: Tsinghua University Press, 1997.
6 Wang exchanges and so on. PC series microcomputer bus. Xi'an: Xi'an Jiaotong University Press? 1995.
7 Lu Yourong. PC series microcomputer interface expansion card design. Chengdu: Chengdu University of Science and Technology Press? 1994
8 Dong Yuqing? Wang Changzhao. High-end microcomputer interface technology and application. Xi'an: Xi'an Jiaotong University Press? 1995.
9 Karen Hazzah. Writing Windows VxDs and Device Drivers. R&D Publications Inc. 1995.
10 Vireo Software. VtoolsD help file. 1995-1996

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