This article focuses on how to implement DAA in software.
The decimal operands used by computers are generally compressed 8421 BCD codes, and each BCD code represents a 1-digit decimal number. Each 2-bit BCD code coexists in the same byte unit, so the BCD operation involves the carry C (bit 0) and the half carry H (bit 5) of the status register SREG. They are the entry and exit bits of the high and low BCD, respectively. When performing BCD code addition and subtraction, the computer is treated as a binary number, so there is a case that the decimal operation rule does not match: First, when a (borrow) bit is generated (C=1 or H=1), The incoming (borrow) bit is equal to 16 (for the 1-bit BCD code involved) and should be equal to 10 in the decimal operation; the second is that an illegal BCD code (value greater than 9) may be generated. The software DAA is designed to correct the above errors.
1 Software DAA implementation method
1.1 Design method for implementing addition DAA function subroutine ADAA and ADAA1
After practice, the BCD code addition operation can produce the following three cases:
1 No adjustment is required, and the feature is that neither the carry nor the illegal BCD code is generated. Such as $22+$11=$33.
2 To generate an illegal BCD code, you must add 6 adjustments. The characteristic is that after the BCD codes are added, no carry is generated, but after adding 6 adjustments, a carry is generated. Such as
$36+$37=$6D (generating an illegal BCD), adding 6 to $73 (generating a semi-carrying H). $68+$87=$EF, plus $66 to adjust to $155 (generate carry C and semi-carry H).
3 To generate a carry, you must add 6 adjustments. The characteristic is that the BCD code is added only to generate the carry, and the illegal BCD code will not be generated at the same time; and the addition of 6 adjustment will not generate the carry/half carry (but the original carry/half carry is cleared), and it will not be illegal. BCD code. example:
$99+$88=$121, carry C and half-H are set, so add $66 to adjust: $21+$66=$87, and resume carry C.
Based on the above three cases, the following method of adding the DAA is obtained: firstly, the status register SREG after adding the BCD codes (the carry C and the semi-carry H, called Co and Ho) are saved. Adding $66 to the sum of the BCD codes produces a new carry Cn and a half carry Hn. If there is one set in Co and Cn (only one!), it indicates that the high BCD meets the adjustment condition and the adjustment is completed. Otherwise, it is not enough adjustment condition, and should be restored by $60; if there is one in Ho and Hn (only Can have 1!) Set, indicating that the low BCD meets the adjustment conditions and the adjustment is completed, otherwise it is not enough adjustment conditions, should be reduced by 6 recovery. In the program, the new and old carry and semi-carry are correspondingly ORed, and only the "or" result is judged. Note that the software DAA function must ensure the correctness of the added value of the compressed BCD code of this byte, and ensure the correctness of the carry-over of the high-order BCD. Therefore, the result of Co∨Cn should be returned to SREG so that the next step can be Correctly implement the high BCD with carry plus.
ADAA is a BCD code addition adjustment subroutine, using register R20 as a working unit (using three registers such as R22, R11, and R10 as auxiliary working units), and all adjustment work is performed in this unit.
ADAA1 is a subroutine for implementing BCD code left shift adjustment in the digital conversion program. It is a special case of addition DAA: it implements the BCD code with the carry bit self-addition in the R20 work unit and completes the adjustment of the sum.
1.2 Implementation of the subtraction DAA function subroutine SDAA design method
It can be seen from practice that the subtraction DAA is simpler than the addition: it is only necessary to adjust the BCD code that generates the borrow. BCD code subtraction, only the following two cases:
1 No borrowing is generated and no adjustments are required, such as $22-$11=$11.
2 Borrowing is generated. At this time, regardless of whether or not the illegal BCD code is generated, the BCD code that generates the borrowing is uniformly adjusted by $A. However, the AVR microcontroller does not add a byte-type immediate command, but instead subtracts 6 to adjust. It should be noted that the effect of adding the original and subtracting to the carry is reversed. In order to ensure the correctness of the multi-byte compressed BCD code operation, if the borrowing C is cleared after the adjustment, it must be restored. For example, $22-$54=$CE, since both C and H are set, $CE-$66=$68 is adjusted by subtracting $66. After the adjustment, the borrowing C is cleared, so the SEC instruction is added to the subroutine to restore the borrowing. C.
Note: The MCS-51 MCU Subtraction DAA subroutine is easy to migrate (half carry AC).
1.3 Design method for implementing right-shifting DAA function subroutine RDAA
See the description of the BCD code right shift adjustment in "3 Fixed Point System Conversion Subprogram".
2 fixed point operation subroutine
(1) Multi-byte compression BCD code addition subroutine ADBCD
Addition is done directly in the register, with R20 as the DAA unit of work. After the BCD codes are added, the sum is sent to R20, and the ADAA subroutine is called to realize the adjustment of the sum (returning the adjustment result after returning to the main program).
(2) Multi-byte compression BCD code subtraction subroutine SUBCD
Subtraction is done directly in the register, with R20 as the DAA unit of work. After the BCD code is subtracted, the difference is sent to R20, and the SDAA subroutine is called to realize the adjustment of the difference (returning the adjustment result after returning to the main program).
(3) Multiplication subroutine MUL16
Operation: (R13, R12) & TImes; (R15, R14) → R17, R16, R15, R14
Use word multiplication with unsigned arithmetic. Take the right-shift partial product and the multiplier, and when the multiplier shift-out bit is equal to 1, the multiplier is added to the partial product to complete the calculation. Can be regarded as 16-bit integer & TImes; 16-bit integer → 32-bit integer, can also be regarded as 16-bit integer & TImes; 16-bit decimal → 16-bit integer, or as 16-bit decimal & TImes; 16-bit decimal → 32-digit decimal. Can be added to the rounding process.
(4) Division subroutine DIV16
Operation: (R17, R16, R15, R14) ÷ (R13, R2) → R15, R14
Use double word division by word unsigned number operation. The calculation is performed by successively shifting the divisor by divisor subtraction, trial, and quotient. It can be regarded as a double-word integer ÷ type integer → font integer, which can also be regarded as decimal ÷ decimal → decimal. Requires (R17, R16) < (R13, R12). Rounding processing can be added, but be aware that rounding overflows may occur (eg $7FFFC000÷$8000=$FFFF.8, rounding and rounding).
(5) Open square subroutine SQR
Operation: (R17, R16, R15, R14) → R14, R13, R12
Can be regarded as a double-word integer X (≤ 4294967295) open square, due to rounding processing, the square root can be up to $ 10000 (such as X = $ FFFF0000 square root is this), so use 3 bytes to store the square root. It can also be regarded as a fixed-point decimal square, and X is divided into every 2 digits from the highest position, and the method of the simulated hand calculation (X is moved to the left by 2 digits to test the 1 root) to open the square.
3 fixed point system conversion subroutine
The subroutine consists of four subroutines: fixed-point integer two-turn ten, fixed-point integer ten-turn two, fixed-point decimal two-turn ten, and fixed-point decimal ten-turn two, called CONV1, CONV2, CONV3, and CONV4. Since the AVRAT90 series MCU only has a byte multiplication byte instruction, the calculation function is not strong, so the shift adjustment method is used to realize the multi-byte data number conversion. Among them, the integer two-turn sub-program CONV1 and the decimal-number two sub-program CONV4 adopt the left shift adjustment method, and the integer ten-turn two sub-program CONV2 and the decimal two-turn sub-program CONV3 adopt the right shift adjustment method. Regardless of the left shift or the right shift, the adjustment is always performed on the decimal number. The purpose is to make the shift rule of the decimal number conform to the binary shift rule: the left shift 1 bit value is doubled, and the right shift 1 bit value is halved. When the highest bit (8) of a BCD shifts to the left BCD, it should be 16 according to the binary number, and the adjacent bit of the decimal number can only be 10, so add 6 adjustments. In addition, if an illegal BCD code appears during the left shift, it must be adjusted. The left shift of the BCD code is only a special case of the addition of the BCD codes. Therefore, the BCD code addition adjustment subroutine ADAA1 can be used to completely solve the left shift adjustment problem. When shifting the BCD code to the right, if 1 bit in a BCD shifts to the highest bit of the lower BCD, it is treated as a binary number, 1% and a half should be 0.5, and the highest bit value in the low BCD is 0.8, so it is necessary to reduce 3 (ie 0.3). Adjustment. Because of the 8421BCD code, the weight of each bit (the actual value represented by 1 on a certain bit) is 8, 4, 2, and 1, respectively. If it moves only within this code bit, it will double the value of the left shift and shift to the right. The rule that the 1-digit value is halved, so there is no need to adjust.
This group of fixed point arithmetic and number conversion subroutine is designed to suit most applications, and can be modified when used. If the integer is over ten, the binary number does not exceed $FFFF. To increase the running speed, you can change the binary number to two bytes, the decimal number to 3 bytes, and change the number of shift cycles (R21) to 16 . If the data accuracy is not enough, you can change the multiplication subroutine to 3 bytes by 3 bytes and so on.
ADAA1 is a subroutine that shifts the BCD code to the left and adjusts it.
RDAA is a subroutine for testing the BCD code after the right shift and implementing the subtraction 3 adjustment, with R20 as the working unit.
Note: In the SQR description of the square subroutine, add the complete root number to the square roots R17, R16, R15, and R14.
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